Researchers from the Massachusetts Institute of technology (MIT) rasabali experimental 36-core processor. The novelty, according to developers, is capable to raise the performance of the chips of modern architecture to a new level.
According to the creators of the new chip is designed to reduce the number of cycles required to perform complex tasks. The processor has a sophisticated logic of data transfer between cores and intelligent system cache. The developers of the chip from the Institute of computer science at MIT tell us that on the chip of the integrated network of mini-routers, which sort and manage the data.
Mini-routers — this is one of the highlights of the 36-core chip. They represent an intelligent way to route data inside the CPU so that the bandwidth of the bus used as effectively as possible, and the processor cores were loaded proportionally. The developers say that the true potential of the chip will be revealed when it will work with multithreaded applications, such as financial analytic products or software to simulate physical processes.
The chip develops a theoretical model of a "shadow network", in which the cache memory can store data from one of the processor cores and not to keep from others. The model also allows to beat large packets of information on small and distribute their processing across the cores, the cores can communicate with each other to coordinate data processing.
In the future, the specialists intend to create a 64-core processor based on the intelligent model.